Dummy Dies Threadripper examined

Fuck you tube celebrities and fuck you

>>62442933
>der8auer
>celeb
wew

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>>62442933

>32 cores at high frequency
>360W TDP
That's why it's not happening.

>>62443158
More like 180 but Intel buthurt is always nice to see.

>>62443178

Hes right about heat per space anon.

>>62443190
Do you have source to back that up?
no?
thought so.

>>62443190
No, because it's not fucking linear, and not even Intel is retarded enough to have high stock clocks on all cores for their hcc CPUs.

>>62442915
AMD sucks

>>62442915
So Threadripper is low-end EPYC by another name. Who would have guessed?[/sarcasm]

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>der8auer actually made die shots of Threadripper
>he was right about TR just being Epyc with 2 disabled dies

Question is: are the two disabled dies functional, or are they legit dead?

>>62443890
Im leaning toward broken infinity fabric between those two dies but who knows maybe the whole thing is a line of EPYC rejects.

captcha: calle calle

>>62443890
probably partially functional, if each has no active cores, why even include them? Probably something like 4 + 4 + 4 + 4

>>62443958
>if each has no active cores, why even include them
So that force is spread equally across the IHS.

>>62443926
>but who knows maybe the whole thing is a line of EPYC rejects.
It's most likely this.

Seeing all the chips are fabbed separately they went "how about another range where we use two working chips and two fucked chips in roughly the same package as epyc".

>>62443958
I don't think its 4+4+4+4.
If that was the case, TR would have the same 128 PCIe lanes and 8 memory channels Epyc has, and artificially limiting both doesn't make much sense to me.

>>62444086
Why even include a die if it's completely deactivated? Why not just throw it in the trash?

it's called binning.
high clocks at low power: TR
low clocks at low power: EPYC
high clocks at high power: Ryzen
sucks at everything: TR spacer

>>62444160
Yes thank you cpt.Obvious what we are discussing here is how what caused the binning since two lines share the same silicon,layout,size and power.

>>62444125
see >>62443982

You wouldn't really want to have empty spaces under an IHS of that size

>>62444125
>>62444264
manufactoring another line of packages and IHS (i.e. a 2 die one) is probably just not worth it, if they have enough "trash" silicon. TR isn't exactly a high-volume segment.

>>62444264
I get that but why not redesign the spreader or the PCB layout? Why not stick the 1-2 active dies in the middle like a normal CPU?

>>62442915
>thinking they were dummies in the first place

>>62444264
You can literally put 2 of them parallel and still be fine.

>>62444476
Because then you are putting all of the weight on those two dies still.

I imagine that the clamping force on the TR4 socket is higher than the regular Ryzen and Intel sockets which means that when you have four dies it is spread over the substrate more. Sticking just two in the center would be like Skylake again where you have substrates bending at the corners.

>>62444544
It's possible, I think this is more plausible though. >>62444460

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Here are the pictures

>>62444560
One Zeppelin die is at around 190mm^2, which is smaller than the die for GTX 1060 and RX 480. The dies are very cheap and I'd expect that since they have to produce only one kind of die it's alot cheaper. Even something like the 8-core 1900X has high enough margins to offset the fact that it takes 4 dies to make.

>>62444684
>>62444656
Zeppelin-chan is cute!
CUTE!

>>62443158
thats still 700 watts less than intels flagship

>>62444509
That'd require setting up a new production line though. The fact that these are just Epyc chips with stuff disabled is no surprise. Intel's HEDT desktop chips are just Xeons that didn't make the grade and binned appropriately. Being able to salvage two CCXs and sell it off as a flagship desktop model is a massive boost to yields.

>>62444210
>what caused the binning
random crystalline defects in the wafer
processing errors
parameter gradients
dust
marginal photo masks
bad photo resist
problems in bonding process

All in all there are many possibilities. The real answers are as secret as the yield rates: strongly guarded business secrets.

>>62443982
>>62444264
>>62444460
>>62448329
Those are processed silicon dies. Being used, apparently, for structural support. Anyone want to explain to me why they wouldn't just use copper shims? There's absolutely no way replacing some of the dies with copper shims would cost more.

>but that would require a separate assembly line
No, you'd just feed half the machines copper shims.

>>62448662
Because they're Epyc chips cut down. That's literally it. This retarded shit with "structural support or the other retarded theories are just pulled out of some peoples asses.

Why are we even talking about this? Why does it matter in ANY way?

>>62448662
>No, you'd just feed half the machines copper shims.
You've never worked in a factory have you

>32 cores to play gaymes
Children are a mistake.

>>62443329
not as much as intel
https://www.youtube.com/watch?v=osSMJRyxG0k&t

>>62442915
This nazi is going to end up getting delidded by Intel one day

>>62443297
That 1000W 18c processor says otherwise..

>>62448791
Go ahead and explain why soldering a copper shim the same dimensions as the die is different from soldering the die itself.

>>62448767
Right. I'm just making sure people understand that.

>>62448767
If they're truly zeppelin cores that are possibly functional and someone finds a way to reactivate them you could buy a $999 threadripper and turn it into a $4200 EYPC.

A lot of big ifs though. I doubt AMD is that dumb, they're probably laser cut at some point, either faulty silicon or the substrate has some infinity links cut.

>>62444656
Call me stupid, but I thought chips were too small to be seen with the human eye.

What'd he do to them to see inside ?

>>62450885
>I don't know what flipchip packaging is: the post

>>62448662
>Anyone want to explain to me why they wouldn't just use copper shims? There's absolutely no way replacing some of the dies with copper shims would cost more.
Dead dies are a leftover of the die manufacturing process. They can't be reused for new manufacturing so it is literally a case of using something they have available.
Copper shims would either need to be bought or made, so it would cost more.

>>62449522
Because you need to order custom cut copper shims or order large quantities of copper to cut yourself. Both options arw significantly more expensive than just using reject dies you already have lying around.

>>62449522
Because you are reusing trash silicon for spacers instead of literally trashing it.
It's cheaper.

The dummy chips exist to load balance the cooler you retarded faggots. No, you can't cram an epyc chip in a threadripper socket.

>>62450885
>What'd he do to them to see inside ?
microscope

What's the difference between Threadripper and 1S Epyc besides clocks? The main difference between Skylake-X and 1S Purley seems to be ECC, more PCI-e lanes and better RAID support, but Threadripper already has ECC and AMD promised it would get bootable RAID as well.

>>62451234
Lanes, cores, memory.
RDIMM/LRDIMM support.

Ah yes and security features being SEV and SME.

>>62450943
There's no need to be a dick, I asked because I didn't understand.

>>62448804
While it's a huge waste of money for gaming the gaming faggots are essentially subsidizing the high performance computing sector. If huge chips like threadripper were limited purely to high performance the volume of orders would be so low that the chips would be incredibly expensive.

>>62451523
>Threadripper
>huge
It's two Zeppelin dies, anon.
AMD conceived an absolutely killer way to scale up.
It's cheap and efficient.
Their high core count offerings have no bad bins.

>>62451034
>>62451059
So you think that AMD is producing enough completely inoperable dies that they can use them as scrap? We're talking about a few cents worth of copper vs. a silicon die that if it's even halfway functional is worth at least 1000 times the copper.

Nah, the dies are functional in some capacity. For some of them, IF may be broken, but I'm willing to bet that AMD doesn't test any of the silicon until after it's on a package and doesn't brand anything until after that testing.

>>62451735
They may not be completely inoperable.
Think damaged cache slices or GMI PHYs. And trash bins.
It would be basically useless for anything but spacer.

>>62451735
>So you think that AMD is producing enough completely inoperable dies that they can use them as scrap?
Yes.

It's a new process and even at a 90% hit rate from the wafer they would get enough after binning to be spacers for TR.

>>62452002
>new process
?
Polaris was a pipecleaner.

>>62443073
$1050...
The cost of my ENTIRE 6 core Ryzen 1600 system.

>>62452024
Process was the wrong word. Architecture might be better.

Basically when you start fabbing a new chip your yields will always be lower than later when it matures.

Right now they'll have plenty of dies not fit for use in Epycs to use as spacers. Maybe later they will use something else like shims.

>>62452213
Honestly whatever.
TR is and will still be the king of HEDT platforms no matter the slight differences in packaging.

>>62451481
>call me stupid
>no need to be a dick
?????????????

I can see it now. Intel releases there 18 core $2,000 chip and then AMD releases a 24 core $1,500 chip

>>62452444
7551p is *only* $2100. And it's full 32/64 with 8 memory channels and 128 lanes.
They don't need to launch anything since its already there.

>>62444160
Implies they have a test setup for the individual cores and aren't testing/rating packaged up chips. Which is interesting but I never heard of such before. The pinouts will be a problem, or they could be actually breaking and recycling the chips through packages.

>>62452545
>Implies they have a test setup for the individual cores and aren't testing/rating packaged up chips
This has always been a thing.

>>62452475
But server mobos muh gaymen single core IPC clock speed.

>>62452631
At >80% yields, I doubt they're doing that. Also, it may not be immediately apparent if IF is working if you don't package the chip first.

>>62453142
So you still have 20% dead chips. Where do they go? Epyc has the best chips, and Ryzen just uses less. TR is where the bad chips go since TR overall sells the least out of the 3 lines.

>it's not dummy dies
>it's non-functional dies!
how does that even differ I don't get it

>>62453206
TR actually gets the best dies, then EBYN, then Ryzen.

>>62453222

dummy = piece of silicon or something else

non-functional = actual die that doesnt work

how is this hard?

>>62453246
if you say it like that it makes sense

>>62453115
>high core count box
>gayms
?
And 200w mode for 7551p should give you at least 3.2ghz single core turbo to play gayms half decently.

>>62453142
>Also, it may not be immediately apparent if IF is working if you don't package the chip first.
They can test all the electric pathways of the chip before bonding it to a substrate. They need to know this before knowing what substrate to bond it to.

This is the binning process.

>>62453232
>TR actually gets the best dies, then EBYN, then Ryzen.
Are you literally retarded? Provide some source next time, but you can't.

>>62453285
but muh jewish benchmark IPC clock speed gaymes gaymes!

>>62453342
Literally AMDs own slide deck on TR.
You can find it at Anandtech.
TR gets top 5% binned dies.

>>62453369
So you admit you're wrong then.

>>62444160
Ryzen(357) dies are different in dimensions?

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>>62453394

>>62453399
No, everything from R3 1200 to EBYN 7601 are different quantities of Zeppelin die in different configurations.

>>62453402
Nice source there. Not.

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>>62453428

>>62453447
Very Epyc response.

>>62452631
Function validation test is and (used to be?) done on whole wafers. But individual power and load tests on discrete components? I can't imagine it could be done. Maybe preheat the chip, or watch voltage stability and get to some sort of confidence level?

>>62452444
It would be though for Intel to have a response to that. AMD would probably be eating into there EPYC sales at that point though.

>>62444701
Was expecting loss.

>>62451735
>>62451775
>>62452002
Not only are the rejects exacly the right height they also have exactly the same thermal expansion (coppers is much higher)

saved

>>62451735
>So you think that AMD is producing enough completely inoperable dies that they can use them as scrap?

Yes? Apparently you have no clue how low yields are for most chips. You usually end up with more partially or fully bad dies than working ones. The faulty ones are either repurposed into a lower SKU or thrown away. This provides a use for the ones that are no good for anything. Due to the way Ryzen is set up, a single faulty CCX has almost no value or hope of being repurposed, even if parts of it are functional.

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>>62442915
>mfw he said "delid this"

>>62458254
I remember hearing that yields were amazingly low for Pentium 1s back in the day, but I kind of assumed that since then they'd figured out how to get decently reliable manufacturing done again. For that matter though, I was also making a big assumption that yields of 80486s and earlier weren't also shit...