>L3 cache latency of 77 CPU cycle Is Intel kill?

>>60791386
>intel is bulldozer-tier
When did this happen?

>>60791386
Meh, AMD's ryzen has low latency inside the Core Complex but something like 140ns outside the CCX.

Intel's cores are on a ring bus design which means higher latency.

>>60791398
so intel ded?

>>60791398
It's happening right now. More cores and more power consumption for everybody!

Intel L3 isn't inclusive anymore
SKL-X memory hierarchy is closer to Bulldozer's now, and I can make a good guess it's because of AVX512

>>60792073
>is closer to Bulldozer's
This is the one thing you never, ever want to hear.

>>60792165
Bulldozer had execution issues, CMT wasn't a flawed design, way too early though.

But caches on BD were terrible, Intel seems to have not made the same mistake, but I think they're underestimating the importance of a large shared L3 pool

>>60791594
.....bingbus ?

>>60792179
Skylake-X was made before we even know what Zen was capable of, this is no way a response to Zen and Intel thought they had enough room to fuck around with the caches since no competition.

>>60792073
>AVX-512
This meme is never going to take off.

>>60792225
Intel needs something to try against Nvidia.

How many XeonPhy's got sold? A few thousand?

>>60791386
If the clock is higher, the same timeframe contains more clocks.
If you heavily underclock your cpu, the L3 access will happen in <10 clocks.
Doesn't mean it's faster

>>60792242
Why do they keep shoving garbage into x86 instead of just making another architecture that can target what Quadro/Tesla is doing?

They'd have killed Nvidia three times over by now had the managers not been insistent on "muh x86."

>>60791386
>comparing dual socket cache latency with single socket

are you actually retarded... or?