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Anonymous
L2 vs. L3 cache: What’s the Difference? 2017-05-19 10:36:06 Post No. 60489374
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L2 vs. L3 cache: What’s the Difference? 2017-05-19 10:36:06 Post No. 60489374
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Yesterday we discussed how caches work, what the difference is between L1 and L2, and the various design elements that determine how fast (and how effective) a CPU’s cache is. Today, we’re going to take one step further and explore the difference between L2 and L3 caches.
At its simplest level, an L3 cache is just a larger, slower version of the L2 cache. Back when most chips were single-core processors, this was generally true. The first L3 caches were actually built on the motherboard itself, connected to the CPU via the backside bus. When AMD launched its K6-III processor family, many existing K6/K-2 motherboards could accept a K6-III as well. Typically these boards had 512K-2MB of L2 cache — when a K6-III, with its integrated L2 cache was inserted, these slower, motherboard-based caches became L3 instead.
https://trujilloweb.com.mx/World/2017/05/18/l2-vs-l3-cache-whats-difference/
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>.mx
Lol
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CPU Caches are all just SRAM
The closer it is to the branch predictor, it's smaller and lower latency, the further it gets, it gets bigger and higher latency.
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>>60489374
It's interesting to see how the was Cache is implemented evolved with the introduction of multi-cored processors. The majority of modern x86_64 have a small (mostly) private L2 per core, with a large shared L3. I think K10 was the first to have this type of hierarchy, but it wasn't implemented too well. It's now interesting to see Skylake X having a much larger L2 and more modestly sized L3, kind of similar to Bulldozer, while AMD have gone back to 512K L2, and a much larger L3.
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>>60489450
>branch predictor
wow anon you are really smart
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>>60489603
Can't really compare Ryzen with Skylake in that regard as Ryzen's L3 is a victim cache
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>>60489374
Next time u post ur shitty blog on /g/ i will pop you with WP 0day.
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>>60489711
instruction cache talks directly to the branch predictor while data cache is tied to the registers, what's smart about that.
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>>60489757
Lmao this skid wanna be
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>>60489768
omg anon you are blinding me with knowledge
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>>60489757
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>>60489603
>AMD have gone back to 512K L2
It's 512KiB per core, compared to a much larger monolithic cache from Intel. Total L2 cache capacity from each are on the same order of magnitude.
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