orr r0, r1, r0, lsl #8 why is arm assembly so convoluted?

>>58847843
It's not.

It's pretty compact compared to x86 or Power.

>>58847843
Because it's designed to be generated by a compiler

If you can't RISC then don't try to CISC

>>58847843
i can't believe you have the gall to say this when the x86 instruction set has stuff like PMOVSXBW for example

ARM is convoluted with respect to MIPS.

It's convoluted because it's available. They spend a lot of time crafting the instruction set to pack as many possible operations as possible into the 2^32 space. They don't expect you to use most of them.

>>58847936
At this point, ARM is about as "reduced" as your mother's fat ass.

Stop using dead terms from the past.

>>58848197
MIPS shot itself in the foot suing all of its partners and licensees for quick bucks.

>>58848314
Can imgtec unfuck things?

>>58848334
No. Qualcomm Atheros is dropping MIPS and switching to ARM. Other remaining licensees in the telecom equipment sector are expected to do the same.

>>58848359
It makes sense

Qualcomm is already an ARM licensee

>>58848536
They also realized they can modify previous-gen smartphone cores to use on network processors and save development cost.

ITT Basement dwellers that will never fuck

>>58848666
t. (You)

>>58848666
t. projecting thirsty preteen

>>58847843
If you're scared of sophisticated instructions, just switch to Thumb

Fairly sure that if you don't want the LSL you can just write
orr r0, r1, r0
even in ARM mode

>>58847995

One word:

VFNMADD132SS