What the fuck happened to HBM2? Was it all a ruse? I remember

>>56140342
Vega is confirmed for the addition of HBM memory. I am not sure about Nvidia though

Nvidia uses it in P100. GAYMUR plebs need not apply until sufficient supply.

>>56140392
I can only assume Volta will have HBM

its been """"confirmed"""" on wccfmeme, but take that with a grain of salt

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>>56141507
AMD confirmed it

>>56141521
Sorry, I wasn't talking about Vega. I meant confirmed as in

wccf "confirmed" nvidia's Volta will be HBM

>>56141533
Oh, okay. I guess I misunderstood.

>>56141559
I kinda worded it like shit NP

http://www.nvidia.com/object/tesla-p100.html

Nvidia already first to HBM2 beating AYYMD by months

>>56140342
Why do you care? Even with gddr5 nvidia is slaying AMD.

HBM didn't help the fury x.

>>56140342
I thought HBM was a AMD tech.
I hope we will see massive improvements in the 5XX and 11XX series

>>56140392
>HBM memory
>High Bandwidth Memory memory
Do you put your PIN number into an ATM machine?

>>56141837
>correcting grammar on /g/

>>56141521
Puerto rico me lo confirmo
https://www.youtube.com/watch?v=VMp55KH_3wo

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>>56140342
HBM in the first Fury was in short supply. Due to the nature of how its manufactured its not going to become a mainstream memory. With every layer you add to the stack you're increased complexity, and dramatically reducing the yield rate of known good die stacks. 8 hi stacks are undoubtedly going to be incredibly rare and pricey.
GDDR5X was thrown together as a stop gap to improve bandwidth/watt without being priced out of wide adoption.

The big benefit to HBM isn't in the memory itself, but the physical pads on die that it communicates with. A 1024bit wide HBM PHY is radically smaller than even a 128bit GDDR5 PHY, and being smaller with less logic it also leaks less current. You're saving die area and power consumption at the ASIC level, doubly benefiting from the memory itself consuming less power.
Prime example right now would be AMD's RX 480.
Of its 150w power target the 8Gbps GDDR5 pulls 40w itself. A single HBM package could provide equal bandwidth while drawing 4w, and the GPU die itself would also draw less power.
Thats an incredibly attractive prospect, but a foundry has to be able to provide KGDSs in sufficient volume. Thats the only hiccup.

>>56141605
It cut down power consumption significantly.
The impact that HBM has is immense and it directly plays a role in how the die is designed.

>>56141703
AMD developed it along with a few partner companies like AMKOR, and submitted it to JEDEC to be an open standard. They did the same with GDDR5 as well, previously ATI created GDDR3 the same way.
They don't make a lot of proprietary vendor lock in selling points.

Didn't Micron have exclusive deal with AMD that they'd have priority on all HBM2 memory for now while the supply is still poor and that's why Nvidia went with gddr5x instead this gen?

>>56141997
SK Hynix is the company AMD partnered with, not Micron. Hynix have a significant head start on production of the stacks so its unlikely that competing Micron and Samsung would be able to ship out usable volume to anyone before Hynix could.
Though Samsung does have a solid pedigree with TSV stacked NAND, and some DRAM modules. I'm not sure how Micron would fair given their consistent blunders with HMC modules.

If you're interested, I happen to have a HBM gpu

shit's cash, yo

>>56141602
> workstation card

>>56141837
Yes, yes I do. Tech acronyms and redundancies aren't unusual. Jesus fucking Christ

Isn't the processing power of current video cards still a bottleneck? Can't really justify the speeds of HBM/2 when GDDR5X or even GDDR5 can still provide enough bandwidth.

>>56142560
the fury/x beat 980ti in some games at higher resolutions didn't it?

>>56141988
>A single HBM package could provide equal bandwidth while drawing 4w
RIP in peace consoles if those ever find their way inside of gaming laptops.

>>56142560
>https://www.computerbase.de/2016-08/amd-radeon-polaris-architektur-performance/3/
>Das Problem liegt vielmehr darin, dass die vorhandene Speicherbandbreiten nicht groß genug ist beziehungsweise die Speicherkompression nicht gut genug funktioniert. Das merkt man an einem deutlichen Geschwindigkeitssprung durch das Übertakten des Speichers.

Würde die Bandbreite nicht limitieren, könnte die Polaris-GPU die zusätzlichen Einheiten besser auslasten. Im Umkehrschluss kann sich die Radeon RX 480 von der RX 470 in erster Linie durch den höheren Speichertakt absetzen und nicht durch die zusätzlichen ALUs. AMD bräuchte für die Grafikkarte eigentlich einen schnelleren Speicher wie GDDR5X, der aber zu teuer für die Grafikkarte dieser Preisklasse ist.

google translate:

The problem lies in the fact that the available memory bandwidth is not big enough or the memory compression is not working well enough . This is evident in a significant jump in speed by overclocking the memory.

If the bandwidth does not limit , the Polaris - GPU could utilize the additional units better . Conversely , the Radeon RX 480 can stand out from the RX 470 is primarily due to the higher memory clock and not by additional ALUs . AMD needed for the graphics card actually faster memory as GDDR5X , but which is too expensive for the graphics card in this price range

>>56142021

>SK Hynix

Thanks, I was trying to remember where I saw this relevant article.

http://www.anandtech.com/show/10527/sk-hynix-adds-hbm2-4-gb-memory-q3

>>56142739
The Tahiti Radeon 7970 had a 384bit memory PHY, total bandwidth was 264GB/s if I recall.
Ellesmere is pulling 256bit, but with much improved color compression for texture datas.

256GB/s being limiting for 36CU isn't surprising, especially when it comes to higher resolutions. The 64CU Fiji having 512GB/s would have ended up limited by its memory bandwidth in a number of instances if it actually had the pixel throughput to keep pace with its compute performance, though a die that large and complex would have been too much for the 28nm process.
AMD will have to introduce a new ROP design pretty quick here.

HBM is great, but it's fucking expensive.

There's your answer. Especially since memory bandwidth is not a bottleneck in GPUs