>Intel said its new processors are going to deliver the biggest

>>62026229
Intel, being a jew company, releases the minimum possible performance gain they can get away with while stifling competition like AMD to help maintain its monopoly.

Some of the faster chips you pay more for are the exact CPU as the slower ones but set to run at a faster clock speed.

>>62026229
sure it only happens once in a decade for intel because nobody kicks them in the ass that often to make them start moving

They meant that they don't want you to buy any AMD chips now, and later when the benches show lackluster results it doesn't matter because they got what they wanted.

>>62026229
By the way, "Intel" is not intelligence, but the opposite thereof - they sell people on the notion that having more computing resources makes it unnecessary for one to use one's resources in an efficient and therefore more intelligent manner, only to turn around and attempt to stifle performance gains with their monopoly.

>>62026229
>Intel said
>40 per cent jump
When are all the Nazis I keep hearing about going to start gassing Jews again?

>>62026229
>40 per cent jump over its predecessor
compared to 1st generation core perhaps

>>62026248
Don't forget your new socket goy! It now comes with 1151 pins instead of 1150.
That extra pin is very, very important.
(Top secret Jew stuff!)

Intel's innovation ability is really incredible. AMD must look at what they're doing and weep. Too bad, I wanted the little slugger to at least have some success, but you can't expect Intel to not do what they do best: make fantastic products.

>>62026393
Every time I think about this, it never gets less fucked up.

>>62026229
Judging from your image, it means you're a marketing kool-aid chugging retard.

>>62026427
I mean I'm not saying this isn't something we can't take advantage of however Intel's paradigm has a limited lifespan and we need to invest in the future.

>>62026229
Reminder to report shitposters.

i7 = 4c/8t
new i7 = 6c/12t
4 cores + 2 cores = 40% improvement??? 50% would be too logical for marketing geniuses.

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>>62026229
>reposting marketing drivel with AMD = MAD image

Brian, it's past your bedtime.

>its Core line will provide as much as a 40 per cent jump over its predecessor

Why do they keep saying this? They've done it like 5 times already and everyone who buys their products calls them out on their shit, do they never learn? They have actual competition now and they're still acting like they have a monopoly, are these fucks that arrogant?

>>62026582
8 is a special number equal to, among other things, the number of planets in the solar system. In Asian culture 888 is considered a lucky number.

There's a certain emotional resonance with the number 8, however even if the next generation is as good as they say only shit will come after that.

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>>62026229
RE-RELEASE KABYLAKE

>>62026229
Intel already has better performance single core
Why don't they simply lower their prices ?

>>62026501
More cores = more power/heat

Slow them down to compensate!

>>62026302
You should consider a career in sales

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>>62026645
>intel
>lower prices

>>62026645
2% Yields.

Bingbus was a mistake.

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>>62026815
>2% Yields.

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>>62026815
>>62026976

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>>62026229
they re-release kaby lake with few more pins to justify a new ecosystem
they claim 33%+ increase on ipc from a monolithic desing that cant provide that without having over the top clocks with tdp of a nuclear reactor
they will probably create the equivalent of nvidia's gpu boost 3.0 to maximum boost the all the cores for 1-2 mins just long for the benchmarks to get a higher result and then throttle them back to avoid a china syndrome
they literally LIE to the public while releasing slides that confirm that they arent faster than kaby lake

>>62026229
They just added moar cores.
That's where the 40% comes from.

>>62028190
>boost the all the cores for 1-2 mins just long for the benchmarks to get a higher result and then throttle them back to avoid a china syndrome
Only reference cards have that issue.
And those boost past it's box frequency.
The same shit happened with the 290x Uber mode
A 95C house fire for the sake of benchmarks

>>62026393
You mean the successor to the 1155 pins that succeeded the 1156 pins?

>>62028816
Yeah, it's actually the same socket, but they'll be incompatible anyway.

>>62026229
>>The eighth generation of its Core line will provide as much as a 40 per cent jump over its predecessor, according to the company.
Only because they have 50% moar coars. It's still just the basic Skylake core. Think about that for a second Intel are literally going for most cores because they can't compete otherwise.

>>62026229
>>That's a leap in performance that arguably happens only once in a decade, Intel said.
>What did they mean by this?
that it will be yet another intel failure to continue the streak

if it can only happen once a decade, amd already did it
better luck in 10 years intel ;)

>>62028873
>Only because they have 50% moar coars. It's still just the basic Skylake core. Think about that for a second Intel are literally going for most cores because they can't compete otherwise.

the fun fact will be the tdp just like 7900x had a tdp of 140
cant imagine the throttle those cpu will have to keep the tdp so low LOL

>>62028873
To be fair, isn't the 7700k's biggest issue core count?
Mainstream 6 core i7s should have been a thing like 3 years ago though.

I'd Intel still using the bingbuss?
Or the house fire Mesh shit?

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>>62026229
this

>>62028947
bingbus on mainstream shit, mesh on HEDT/Xeon

>>62026229
>believing marketing
why can't /g/ just fucking wait for the garbage to come out before they start to shill

>>62028978
How well does the ring of fire work with 6 cores?
Works fine with 4 cores sure, but 6+?

https://www.techpowerup.com/236312/zen-meeting-vega-in-amd-raven-ridge-apu-confirmed

t-they'll fixed vega on the apu right?
a-at least we'll get hbm right?

>>62026229
if this is true we should thanks AMD for that

>>62028998
Ringbus works well up to 10 cores and up to 2 columns of cores without running into significant bottlenecks. After that though, a third column of cores is needed, and that at minimum requires another ring, with each column getting linked to 2 of the 3 rings, which in turn makes traffic routing and control a nightmare.

4 columns of cores necessitates splitting it into 2 sets of cores, each with their own ring and a buffered switch between the 2 sets. Not only does this incur a huge latency penalty switching between rings, but with the memory controllers split between the rings and the System Agent/Uncore linked to only 1 of the rings, theres a ton of latency and bandwidth penalties when it comes to memory or system accesses. On top of that, the bandwidth available on the rings really starts getting sucked up, and global performance starts to take a hit. As it gets up past 20 cores, there's simply not enough bandwidth to go around, and the buffers between the rings are getting hammered.

>>62029003
Given the fact it has to fight intel integrated video chips, probably it don't need to put that much effort.
Also HBM is a complete deal sealer here, because it's less chips on the motherboard, allowing you to make the PCB in general a lot smaller.

>>62026393
>what is am3 and am3+

>>62029066
>works well up to 10 cores and up to 2 columns of cores
But then why did Intel make the mesh ring of fire for skylakeX?
Doesn't seem to work well for their 10core

>>62029121
the 10 core is just cut down 18 core

>>62029098
A bit messy retro-compatible standards.
am3+ chips worked on am3 boards IF the bios supported it, and most didn't.

>>62029098
A back/frontwards compatble chipset?

>>62029142
What about the skylakeX 6 core then?
Is that a cut down 18core?

>>62029121
Because SkylakeX is literally derived from their Xeon dies. Its how its been since Sandy Bridge-E. Chips that fail to make the grade for Xeon use are binned into the i7 and i9 pile.

>>62029142
10 core is actually a LCC SkylakeX die with all cores enabled but with 2 memory channels (1 on each side) disabled and all of the server shit turned off. 12-18c SkylakeX are derived from the MCC 18c die with the same shit turned off/disabled/nonfunctional.
All of the SkylakeX dies are equipped with 2x Triple-Channel memory controllers, but the i7s and i9s have access to only 2x dual-channel.

>>62029087
i doubt they'll replace dram with hbm.
it's probably 2GB of hbm for the graphics.
but hey, if they do replace the ram, that would be great.

>>62029003
Vega needs no fixing, just some quality consumer drivers.

>>62026229

if    4c/8t  == 100%
then  6c/12t == 150%
Combine that with a lower all-core turbo speed to keep it in ~100watts.

That's what they mean.

>>62029524
SoCs generally just share the memory between the GPU and CPU and even the L3 cache.
Sharing the HBM between the CPU and GPU is probably trivial as fuck to AMD now.
They probably can get away even with a version of the chip that has NO DDR memory controller whatsoever.

>>62028936
6850k is shit.