Thread replies: 12
Thread images: 9
Thread images: 9
Anonymous
R.I.P Intel (Comp Arch 101) - Skylake X/Xeon X's unscalable clock speeds 2017-07-19 02:18:46 Post No.
[Report]
R.I.P Intel (Comp Arch 101) - Skylake X/Xeon X's unscalable clock speeds 2017-07-19 02:18:46 Post No.
[Report]
File: 1491000390568.jpg (33KB, 900x810px)
33KB, 900x810px
R.I.P Intel (Comp Arch 101) - Skylake X/Xeon X's unscalable clock speeds
Anonymous
2017-07-19 02:18:46
Post No.
[Report]
https://videocardz.com/newz/intels-12-core-i9-7920x-features-2-9-ghz-base-clock
> Mesh interconnect for core communication
Because each node in a mesh has to act as an endpoint and a router, it has to draw more power to operate.
> Monolithic die
Increased heat density
Reduced clocks with scaled # of cores.
Leading into and out the back of 7900x, it appears there is a 300-400Mhz drop in clock speed per (+2) increase. No mention of what occurs to the mesh interconnect clock speed as they scale cores. Also, there is a non-uninform communication penalty depending on which core is communicate with another. Did intel think they could wire-up and scale complex CPU cores like simplistic CUDA cores? Did they fall for the spatial-computing meme?
I think this about wraps it up.
Look for intel switching to MCM down the road.
X299 on death watch.
Game over man.
>>
File: 1497891461086.jpg (54KB, 679x758px) Image search:
[Google]
54KB, 679x758px
>>61455371
delid this
>>
File: 1489870475277.png (246KB, 882x758px) Image search:
[Google]
246KB, 882x758px
S-shut the fuck up AMDrone!! Your RedTeam+ membership can be renewed only so many times..
>>
The Jews always fuck up.
Banned and genocided in every country on the planet at least once.
Couldn't even build their own country and had to beg Britbongs and a few other superpowers to do it for them, while having a lucky sympathy break due to Nazis.
Couldn't even maintain their gifted country without USA and the Western powers pouring insurmountable amounts of money into it, giving them unfair and free trade deals, and even gifting them technology.
Still ended up the most hated people on the planet despite Lolocaust and now the world voted to give Free Palestine independence because Jews started acting out and roleplaying the Apartheid and Nazis.
How can one people be so incompetent and destructive?
>>
File: 1494387422977.jpg (181KB, 888x1120px) Image search:
[Google]
181KB, 888x1120px
>>61455371
Another revelation : That mesh interconnect is probably the reason why they couldn't solder the heatspreader on to the die. Depending on which layer its in and its characteristics, it'd probably get damaged by the extreme heat cycle. They Absolutely fucked up at the most fundamental level of their architecture. You could swing by a comp. arch professor's office hours and they'd likely tell you this is no bueno for scaling.
Habbenings confirmed.
>>
>>61455752
>schlomo how are we supposed to add the heat spreader to this "new" die?
>just jizz on it, menachem, its what the goyim deserve
>>
File: 1411813687499.jpg (50KB, 395x401px) Image search:
[Google]
50KB, 395x401px
>>61455371
>mess interconnect
>>
File: [GJM] Urara Meirochou - 10 [7EF256EE].mkv_snapshot_18.02_[2017.03.10_15.00.34].png (656KB, 605x582px) Image search:
[Google]
![[GJM] Urara Meirochou - 10 [7EF256EE].mkv_snapshot_18.02_[2017.03.10_15.00.34].png](https://cdn.4archive.org/g/image/1500/476/1500476250331.png "[GJM] Urara Meirochou - 10 [7EF256EE].mkv snapshot 18.02 [2017.03.10 15.00.34]")
656KB, 605x582px
>>61455847
It keeps happening.
https://www.youtube.com/watch?v=mTQ6ymQIY64
>>
File: 1443350444487.png (72KB, 464x928px) Image search:
[Google]
72KB, 464x928px
>>61455830
>>
File: image_12.jpg (46KB, 343x450px) Image search:
[Google]
46KB, 343x450px
>>61456008
>>
File: 1495228655847.png (1MB, 1688x1916px) Image search:
[Google]
1MB, 1688x1916px
>>61455955
The reason for this is likely due to how they setup their clock zones. For every clock zone, there needs to be a synchronization protocol that adds overhead. So, he mentions that the Mesh OC becomes negligible when he OC's the processor. This is due to the clock multiplier setting between core/mesh locking in operational performance. I'm assuming they have a slew of clock zones and subsequent synchronization points.
Quite messy
>>
>>61456679
OCing X299 seems like a lost cause anyway.
Thread posts: 12
Thread images: 9
Thread images: 9