It's over for AMD. https://www.ocaholic.co.uk/modules/

at the low low price of your pituitary gland!

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>>60463991
ITS NOT FAIR GUYS
THIS CANT BE HAPPENING

>>60463991
>*only if workloads fits into L2 cache which is almost never
B R A V O Intel. Now suck some dicks.
>https://www.servethehome.com/amd-epyc-new-details-on-the-emerging-server-platform/

>>60463991

So actual performance will be 2.9% faster?

>>60464111
0.29% faster.

>>60464111
actual performance will be 30% less, as it's never going to clock as high as 7700k

>>60464103
>if workloads fits into L2 cache

yeah why don't we just benchmark all processors on their L2 caches?

jeesus
we're left to assume that L2 cache misses are responsible for 30% of our performance?
shittel

Wait(tm) for Zen 2.

>>60464145
>yeah why don't we just benchmark all processors on their L2 caches?
Then Zen rapes every consumer Intel CPU ever and Intel's PR is dead.

>>60463991
Did you really have to dig up the most no-name literally who website flat out lying about this shit for clicks?

>>60463991
Actually, that's misleading because Intel's "IPC" isn't the "Instructions Per Clock" we all know and use.

I shit you not.

>Nevertheless, the there are huge differences regarding the gains in IPC performance between the two upcoming Core i9 parts and that actually makes us question either the results we’re looking at here or the reliability/stability of the benchmark that was used.

Even they know it's bullshit, but they post it anyway with clickbait headline. Tech enthusiast "journalism" needs to burn to the ground. Worse than Gawker. Worse than Kotaku. Fuck off forever.

>>60464178
It's a pretty well known website anon.

>>60464190
Let me guess, Intel Performance Counter?

>>60463991
29% higher SysMark score
1% higher IPC in reality.

>>60464243
Just use bigger L2. :^)

http://www.redgamingtech.com/intel-skylake-benchmarks-surface-15-ipc-gains-on-skylake-s/

Lmao

>AMD zen ipc higher by 40%
>when using 5 instructions per clock, which is also never

>>60464427
>instructions per clock are higher when having more instructions per clock

>>60464145
Intel can we benchmark on L2 cache?
>benchmark in L2 cache?
>why you wanna benchmark in L1 cache?
>only benchmark in prefetch

>>60463991 (OP)
LOL Skylake-X has less L3 cache than Broadwell-E. Don't be surprised when the 7920X is barely faster than a 6950X you enormous kike faggot.

Doesn't matter anyway since Threadripper is going to put the whole Skylake-X line directly into the fucking oven. Sorry, kiketel shekelchaser, but the second shoah has begun.

>>60464980
>LOL Skylake-X has less L3 cache than Broadwell-E.
While having 4 times the L2. Why did Intel change cache hierarchy? Who the fuck knows.

>>60464993
Mainly for AVX, and large blocks of l3 are power hungry and yield badly.

>>60465165
>Sir, people are buying Ryzen despite low AVX performance, what do?
>MAEK MOAR AVX

>>60465481
>low
It's adequate. AVX is extremely niche anyway.

>>60465165
How? SRAM is a very simple circuit, how can it yield badly?

>>60463991
really makes no sense since its just skylake. maybe they're basing that off the MOAR COORRRSSSSSSSEESSSSSS!!! or wait, larger l2 cache? lmao really intel. man they are grasping at straws.

>>60463991

Wonder what kind of price hike they'll give it

>>60463991
>Only if the application fits in 1MB of Cache but isn't smaller than 256K so basically rarely ever*