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TSMC claims that they will finish 5nm development this year.

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TSMC claims that they will finish 5nm development this year. I thought 7nm was the limit? Is 5nm the new final limit?

source:
https://www.fool.com/investing/2016/12/14/apple-incs-7-nanometer-path-to-a12-a13-chips.aspx
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>>60290309
It's mostly marketing at this point
>>
>>60290309
You know, all we have really seen from process reductions is increased heat, due to lower surface areas meaning lower heat dissipation.

They talk about potential speed and performance increases but what we are probably going to see is just more chips overheating and downthrottling, stuttering and other shit.
There's literally no advantage to going from 14nm to 10nm to 7nm to 5nm in the span of four phone generations yet that is what they are suggesting is going to happen.

I wouldn't even call 14nm in the mobile space mature yet.
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>>60290973
>smaller process means more heat
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>>60290384
/thread
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Is >>60290973 retarded or pretending?
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>>60290973
I kind of understand your point. It seems like """""7nm""""" is just going to be another marketing meme though, so we won't get much denser transistor count.
>>60291022
What's wrong there? The chips get hotter due to less surface you can use for heat dissipation. Overall they may consume less power, but they might still run hotter.
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>>60291022
>>60291039
He's actually right. Notice how the nodes are getting taller and thinner, so the overall transistor volume stays about the same.
And since you're packing them closer together, you get temperatures that are harder to control.
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>>60291134
But don't the smaller transistors use less energy, thus dissipating less energy by themselves?
Because of that you can't really say it's one or the other cause there'd be some tradeoff.
>>
>>60291404
You're right, but you should also consider what it means to pack things that produce heat tighter together.
>>
>>60291404
From what i remember from uni its about the drain size ,if its smaller it has bigger resistance and gets hotter (as in has a higher temperature in a hotspot). The higher the temperature the lower the current/voltage that the drain can carry. I may be totally wrong though, since i was never any good with electronics, and don't know how different are transistors i an intel cpu compared to a standard FET,so maybe some anon who knows his shit will correct me.
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