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pic related when? wouldn't it be nice to have an FPGA on

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Thread replies: 17
Thread images: 2

File: xeon_w_fpga.jpg (24KB, 648x348px) Image search: [Google]
xeon_w_fpga.jpg
24KB, 648x348px
pic related when?

wouldn't it be nice to have an FPGA on package (or on die) instead of wasting half the die space on retarded iGPUs?
>>
>>57181514
https://www.crowdsupply.com/raptor-computing-systems/talos-secure-workstation

This board has a CPU and a FPGA. It's close enough.
>>
>>57181567

>It's close enough.

nope

jewtel has to make this shit mainstream. i want a Doom core running physics on the FPGA when i fire up Doom. or a Photoshop core, or an AfterEffects core, any computationally heavy task would benefit from an FPGA accelerator on die.
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>>57181631
Either it will never be mainstream because the market is too small or it will cost a fortune.
>>
>>57181631
or they could just use the igp that is already there to do all that, that way they wouldn't need to design a core with every game people make..
>>
>>57181699

the game developer would provide the fpga core for their game
>>
I'd really like to see FPGAs become common fare. Establish a library for various array arrangements for handling certain workloads, and allow a dedicated bus between the CPU logic to instantly alter the array as necessary.
HSA actually can facilitate this already. If these components were placed on the same die the performance potential would be astounding.
>>
>>57181920
>>57182080
what if we get FPGA's or other co-processors to dump the workload of a CPU on to so that you can dedicate all cycles of your main processor to a certain task? I could imagine that would yield a near 100% on paper performance
>>
File: notsureifserious.jpg (26KB, 383x192px) Image search: [Google]
notsureifserious.jpg
26KB, 383x192px
>>57183115
>>
>>57183115
>>57183348
no really
im going for my comp sci major and am making a Beowulf cluster with a Dr. of Computational Physics and with my friend in his basement. I think something like this could be helpful because if you think about it processors need to dedicate a minimum of X cycles to the OS no matter how small of a footprint it leaves, plus im obsessed with FLOPS and high performance computing.
My best friend and I are planning on designing our own programming language at some point too
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>>57183441
we have the ability to use something on the order of 40 CPU cores (of a very mixed nature) in our cluster and hopefully the University cluster will have about 42C/84T
>>
>>57181631
>>57182080
>>57181920
or a bitcoin miner core for some shady software you installed :^)
>>
>>57183505

well, that risk exists for CPUs/GPUs as well
>>
>>57183505
>implying a processor thats not a GPU is good for Hashing
>>
Intel already produces custom FPGA/CPU designs for large corporations (amazon, ebay, etc)
They are working on building them on the same die but i dont think they're there yet.
>>
It's easier to try and predict what kinds of workloads the end user will be dealing with and provide an ASIC that meets those workloads. An FPGA that can meet all of those workloads might require a lot more die space and then there's the issue of making the reprogramming part user-friendly. The end user will almost assuredly deal with some graphical workloads so it helps to have a dedicated ASIC that can accelerate those workloads.
>>
Intel bought Altera for a reason. You are going to see more hybrid CPU+FPGA chips in the future. It's already happening
Thread posts: 17
Thread images: 2


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