Deos anyone actually believe Intel/TSMC would have figured out

3D complex logic? Lolno, no way, you'll get the next best thing, multiple dies on a interposer.

>>56146849
>After more than 50 years of miniaturization, the transistor could stop shrinking in just five years.
Stopped reading there, not gonna read an article by some dumbass who can't even proofread

>>56146849
The problem with this will be removing all the heat. If you stop shrinking, power consumption only goes up, and all that power will ultimately be converted to heat.

>>56147433
What if they just use less volts so that there's less heat and it doesn't need to dissipate as fast?

>>56146849
The idea is great.
In theory it would allow us to make much more complex chips with better "shared memory", new paradigms, new compilers, much more cores in single CPU and so on.

But the hard reality is: how to actually made it in with reasonable price?

>Intel charges you $300 for a 120mm2 die
>they'll charge 20 times for 10 stacks.

>>56147606
I wanna fuck a dog in the ass. You know that?

>>56147433
They could utilize a technology like through-chip water cooling: https://thestack.com/world/2015/10/05/on-chip-liquid-cooling-promises-longer-life-smaller-devices-and-the-end-of-heat-sinks-and-fans/

>The group successfully developed a standard demonstration test, including one for DARPA officials, in which a converted FPGA with bespoke Altera-supplied architecture operated, with no other cooling, at less than 24 degrees Celsius, and was compared to an analogous air-cooled device operating at 60 degrees Celsius.

>>56146849
3D stacked logic is incredibly simple with vertical GAAs.

>>56147433
If your switching voltage is low enough then self heating stops being an issue. In the next few years we're looking at mv switching on high performance nodes.

>>56147560
Without process shrinks they're not going to be able to lower the voltage

>>56147642
At what cost? And there will be limits to this. To remove more heat, more water will need to be moved through the chip, which will increase the pressures. Something makes me think chips arent suited for containing high pressures.

>>56147692
lowered voltage was accomplished by die shrinks was it not?

>>56147711
>Without process shrinks they're not going to be able to lower the voltage
This simply isn't accurate.

>lowered voltage was accomplished by die shrinks was it not?
Drive voltages can be lowered via conventional CMOS scaling because its exploiting the short channel effect. That is the crudest means to an end possible though.

File: images.jpg (25KB, 470x313px) Image search: [Google]

25KB, 470x313px

>>56147642
IBM is experimenting with "electronic blood" that could supply power to the chip whilst also serve as an efficient coolant.
>There have been a number of solutions suggested for this system over the years, but one of the more intriguing comes out of IBM’s fluid research labs, which are currently testing the idea of using what it calls “5D electronic blood,” which should be able to deliver power and cooling in one futuristic mix.
The system is in its very earliest stages, but works in principle. Using IBM’s developed microfluidic channels on a sample chip, it is able to funnel in a cooling fluid solution mixed with what Ars Technica calls, “redox couples,” that are capable of producing electricity when oxidized and then reduced again to lose that charge. The idea is they flow through the chip, cooling it and delivering power to it at the same time.

>Because of this unique system, power can be delivered in much more versatile ways than traditional hard connectors, allowing for stacked chips that could make it possible for multiple CPUs and GPUs to be built on top of one another, each with their own unique power and cooling system.
By doing so, hotspots should become less of an issue, thereby allowing for much higher clock speeds – as has been evidenced by some overclockers using liquid nitrogen and other super cool compounds to push processors far beyond their manufacturer stated limits.

>A lot of this is potential rather than proved theories, but in principle it works. IBM has managed to deliver 100 milliwatts of power to a chip while dissipating all of its generated heat. It will need to be scaled up and perfected before it becomes commercially viable, but if achieved, IBM could usher in a whole new age of efficient silicon, which could help stave off the need for a switch to different building materials for future computers.