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Can they put a GPU next to 2 CPU's?

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Can they put a GPU next to 2 CPU's?
>>
>>61389545
Yep,HSA comes to live,http://www.hsafoundation.com
>>
>>61389545
dunno, but im more interested if they can put some HBM2 stacks next to it
>>
yes. Custom processor for the CERN is on track.
>>
you can glue anything together with infinity fabric, anon.
>>
>>61389633
DELET or else.
>>
It would be cool if you only needed "one" chip to run the most important parts of the computer.
>>
>>61389616
That's what Vega is.
>>
>>61389742
next to 2 CPU's to act as a giant L4 cache, not next to a GPU
>>
>>61389545
Apparently AMD can glue them but Intel can't.
>>
>>61389811
AMD puts the glue *between* dies to connect them together.
Intel puts the glue *on* the die to save 4 cents on TIM.
>>
>>61389965
What?
>>
>>61389951
Kek
>>
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>>61389633
>ryzen will enable CERN to rule the world
>>
>>61389545
yes
>>
>>61390746
What's that?
>>
>>61390894
that's a 32 core APU with memory on die
>>
>>61390919
Looks like a Final Solution for "Intel in HPC" problem.
>>
>>61390942
if they manage to make it comparable to a real gpu in compute, yes

at least for organizations that don't want to buy separate cpu and gpus this could work
>>
>>61391018
Beats anything Intel has to offer, in any case.
>>
>>61391062
fair enough
>>
>>61390746
oi vey, anudda shoa!
>>
its called an igpu

so yeah
>>
>>61391018
It's designed for exascale aka a billion-billion calculations per second. Imagine entire farms running cabinets stuffed full of dual socket chips like this in every node. It would be near the top if not the first of the top 500.

There are like three places in the world where something like that would even be stressed.
>>
>>61389545
so like an APU?
>>
>>61389545
Nigga they can do what ever the fuck they want.
>>
>>61392792
That is not the same thing at all. Integrated GPU with it's own on-die RAM would be better than shared system RAM.
>>
>>61392879
implementing a gpu on-die with the cpu is called an igpu

it's integrated
how are you missing the point
>>
TR4 socket APUs would probably cannibalise their discrete GPU market and need alot of cooling
>>
>>61392857
what are some examples of organizations that'd need/want this?
>>
>>61393012
Goverments that want VERY powerful supercomputers.
>>
>>61393012
DARPA, CERN, any National Lab whether it's for aeronautics, nuclear energy, or space exploration, Department of Energy, anything that needs the computational power of millions of CPU/GPU cores.
>>
>>61393072
sorry for all those questions, but why those APUS are better than that server AMD showed that has 100 Tflops of computing power on a 2U form factor?
>>
>>61393138
Because an Exaflop is 1000 Petaflops, which is 1000 Teraflops.
>>
>>61393170
I understand this, what I don't understand is why someone would take these over dedicated gpus and cpus, which are arguably better at their own jobs
>>
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I see the future! CPU + GPU in one chip! Nvidia BTFO. SSD so fast that it competes with memory ram! I need more ram! Just create a larger partition!
>>
>>61393232
Less latency getting shit to and from the GPU portion. Right now they're punished by PCI-E latency in getting data from the CPU and main memory to the GPU.
>>
>>61393259
>SSD so fast that it competes with memory ram!
You mean SCM?
>>
>>61393232
Read up on HSA.

With your solution you have either serial(CPU) OR parallel(GPU).

With HSA you have serial AND parallel at the same time. The A in APU stands for accelerated so it could complete tasks MUCH faster than one or the other.
>>
>>61393263
so literally squeezing every last drop of performance out of their equipment?

makes sense actually, every microsecond saved adds up to a lot of time when you consider the amount of nodes they're using
>>
>>61393302
Exactly. Also, not sure if it's true or not, but if such a "super-APU" with the HBM is possible, there's the rumor going around that with HSA the CPU cores would be able to directly access and use the HBM as an L4 cache.
>>
>>61392978
Fuck no they wouldn't.
>>
>>61393275
Noice.
>>
>>61393353
They can test this with EPYC2.
Slapping some HBM2 into SP3 package, like a 8-hi stack per die.
>>
>>61393259
>CPU +GPU in one chip
>wat is APU
>>
>>61393294
nice read, now I understand, thanks

>>61393353
fast L4 cache would be a nice thing to have
>>
>>61393423
Better than that, if HBM is acting as an L4$, that means the data from the GPU is dropping in to the L4 and it becomes truly heterogeneous. There is zero delay between parallel and serial compute.
>>
>>61393375
They'd have to install the GPU though because of the requirement of an interposer to mount the HBM to in the first place.

>>61393471
>There is zero delay between parallel and serial compute.
Well, significantly less vs bouncing it from GPU memory to main memory and back for processing. Still non-zero due to the unavoidable latency from sending the data out across the IF link then through the GPU to the HBM, which IIRC has a latency penalty of its own simply due to how it works.
>>
>>61393471
what size should that L4 cache have so it can do this properly?
>>
>>61393526
>They'd have to install the GPU though because of the requirement of an interposer to mount the HBM to in the first place.
You can use silicon interposer without GPUs, dummy.
>>
>>61393471
So how does HBM compare in speed to RAM?
>>
>>61389545
Yes, that's what an APU is. It's hard to buy an Intel CPU that isn't one.

There are two problems with what you're specifically thinking:
- Power and cooling. Performance GPUs are expected to nominally cap out at 300W a chip, while even the most housefire of CPUs top out around 150. GPUs specifically live on riser cards to move that heat away to somewhere more manageable while providing room for a lot of power circuitry; without wildly reengineering everything from sockets to PSU designs the best you can integrate is a budget gaming GPU plus a truly garbage CPU or a good CPU plus an >intel integrated tier GPU.

- Workload scalability: if your work is being done on GPUs, by definition it scales amazingly; you're using a GPU for its parallelization. Which means you don't just want a budget GPU, you want the beefiest one you can possibly fit. And by "one", I mean "four dual-socket parts per machine for whiteboxes, with a serious look at engineering your own backplanes to fit more".
Meanwhile, all this can be controlled by a single CPU. So if you integrate the whole mess on a single die, you're sacrificing money and performance for seven (or more!) useless CPUs, even before we get into the problem of cramming several kilowatts of TDP into a physical standard designed for around fifty and later "supplemented" to 150.
>>
>>61393630
HBM2 caps at 256GB/s per stack.
That's VERY fast.
>>
>>61393561
True, but it would require spending space on the CPU dies for the HBM interface that would otherwise not be used in most cases (Do you see AMD making Ryzen2 with a fat lump of still expensive as fuck HBM2?). IMO it would be more efficient to use the GPU for the HBM interface on its own interposer, and just link the CPUs and GPU via IF.
>>
>>61393671
HBM PHY is relatively small and full node shrink that is 7nm LP makes it possible.
>expensive as fuck HBM2
Meme. The volume is not there, HBM itself is relatively cheap, since the dies are peanuts-sized.
>>
>>61393660
why are we still using normal ram when this exists then? just make some hbm modules that can be popped into the motherboard and cooled with a heatsink
>>
>>61393824
Capacity.
Upgradability.
>>
>>61393660
damn, that's almost L3 cache levels of fast
>>
>>61389695
So... A SoC?
>>
>>61393856
Yes.
Did i tell you it was made by AMD?
ATi/AMD are historically good at inventing fucking memory and i don't really know why.
They don't even fab it.
>>
>>61393846
>capacity
aren't there 8GB hbm2 stacks? just slap a bunch of those under a heatsink and done
>>
>>61393881
There are, but that's still nowhere near enough memory.
>>
>>61393899
For what?

Facebook on chrome?
>>
>>61393911
No, some database on server.
>>
There's also an old idea of stacking SRAM under the chip itself.
Intel did that in Polaris.
>>
>>61393928
it could still be used as "L3.5" cache, even 1GB of that would help a lot in some workloads
>>
>>61393950
You mean L4 cache?
Also AMD needs to make IF faster and even lower latency to leverage advantages of on-package HBM.
We'll see.
It's their tech, i'm sure they'll find a good use for it.
>>
>>61393960
yes, but with speeds that close to L3, it's not that far off really

IF can hold on it's own up to 512GB/s, the problem is that it runs at too low frequency on ryzen
>>
>>61393995
>the problem is that it runs at too low frequency on ryzen
IF is a protocol.
The physical layer speed depends on implementation.
GMI caps at 42.6GBps bidirectional.
IF going through PCI-E root complex capts at 37.9GBps bidirectional.
If Navi truly is MCMed GPUs, we'll see what kind of PHY they will engineer for it.
>>
I stopped giving a shit about amd and intel and nvidia two years ago.

Quick rundown?

Is it athlon 64 all over again?

Is my 2500k still good?
>>
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>>61394030
>Quick rundown?
Intel is panicking and screaming
>EPYC IS ANNUDA SHOAH
in official SKL-SP slides.
Vega may or may not be R300 2.0: electric boogaloo.
>>
>>61394030
yes
also yes
>>
>>61394067
>>61394059
Jokes aside, what has amd done?

Did they kill bulldozer?

Did they release their fucking arm+x86 soc?

Is intel TRULLY JOKES ASIDE NO HOMO NOT A PRANK NOT RUSING NOT BAMBOOZLING doomed?
>>
>>61394117
>Did they kill bulldozer?
Yes.
>Did they release their fucking arm+x86 soc?
There was never one.
>Is intel TRULLY JOKES ASIDE NO HOMO NOT A PRANK NOT RUSING NOT BAMBOOZLING doomed?
If their new x86 uarch is shit they will die like the DEC did.
>>
>>61394030
AMD has roughly caught up to Intel (Broadwell-E/Skylake IPC, but 20% better virtualized thread performance versus HT), but has undercut Intel in price while not resorting to Jew tactics to artificially segment their product line.
Intel is doing really poor damage control as a result.

AMD has almost caught up to Nvidia, but Vega is still not good enough. Blame poor drivers (again) rather than a shitty architecture. Nvidia is laughing at Vega's unoptimized state and not giving a single fuck.
>>
>>61394160
>Vega is still not good enough
Looks like Vega is doing mighty fine where it works.
>>
>>61394117
AMD released a scaleable architecture, with which they can just slap 4x8 core dies together and get 90% scaling. Intel's monolithic dies with shit yields, low clockspeeds and high price tags can't compete against this. So they resorted to screeching like a little kid that AMD's arch is "4 desktop dies glued together", the result was massive hilarity and laughter all around.
>>
>>61394197
https://youtu.be/NoelgG8JoyQ?t=7m29s
>>
>>61394188
It has a larger die size than Fiji, but only 1.15% of the performance at similar clock speeds. The FE card can only beat a GTX 1070. Something has gone horribly wrong with Vega, since Nvidia's pushing 12 TFLOPs on a similar-sized die
>>
>>61394213
tl;dr?
>>
>>61394223
>It has a larger die size than Fiji
What are you smoking?
>1.15% of the performance at similar clock speeds
>>61394059
>>
>>61394197
>>61394160
What kind of jewish tricks has intel done?

The only one i actually fell for was a "binned" 2500k
>>
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>>61394237
>>
>>61394246
>What kind of jewish tricks has intel done?
Spreading FUD riiiiight in the official SKL-SP launch slides.
>>
>>61394246
they released 56 cpus that are basically 15 different models with certain features on/off and they cost a fuckton of money

they're also resorting to FUDding on AMD products because they're desperate
>>
>>61394246
>>61394260
>>61394272
https://www.techpowerup.com/235092/intel-says-amd-epyc-processors-glued-together-in-official-slide-deck
>>
>>61394272
>>61394294
Now about gpu's, is amd still powerfull but also hot and an energy hog
>>
>>61394355
We don't know anything substantional about Vega.
Also GPUs are inherently housefires.
>>
>>61394213
now this is some good marketing, not that ""marketing"" from intel
>>
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>>61394479
Yes.
There was a video about IF but they removed it.
>>
>>61394508
he said "tomorrow" a lot of times, what is actually happening today?
>>
>>61394526
Nothing. Looks like it was filmed a day before EPYC launch.
>>
>>61389545
>8c/16thread + vega with hbm2
muh dick
>>
Samsung needs to hurry with low-cost HBM already.
GDDR really-really needs to die already.
>>
>>61394540
but he mentioned "glued together", "FUD" and "ecosystem" a number of times, wasn't he mentioning those intel slides?
>>
>>61394575
These slides are from June.
AMD knew about them.
You know that Intel has no friends left anymore?
Price gouging is bad. Bad!
>>
>>61394237
7:29
>>
>>61394587
oh well, now intel doesn't look that much of a retard anymore, I wonder what they did when they saw epyc's presentation
>>
>>61394756
They look even more retarded, anon.
It was a closed door presentation for chosen few. And Intel was showing THAT.
>>
Oh Intel, you are going the way of DEC, SG and Voodoo if you continue doing shit like that.
Arrogance has no place in semicon industry.
Arrogance killed DEC and Voodoo.
>>
>>61394781
but if they had said those things after the presentation they'd look even worse
>>
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>>61394756
>intel doesn't look that much of a retard anymore
I dunno about that.
>>
>>61394213
Does intel have hardware accelerated encryption? This will be a HUGE deal.
>>
>>61393660
So watchu sayin is, if they put 16GB of HBM2 on the CPU then there would be no need for RAM? Or just like 8GB-16GB of RAM that never gets used.
>>
>>61394905
SGX requires you to basically sell your soul to Satan (i.e. Intel). It's not transparent at all, and in every way inferior to AMD's SEV/SME.
>>
>>61394223
Radeon are pushing 12.3 TFLOPS.

https://instinct.radeon.com/en-us/product/mi/radeon-instinct-mi25/
>>
>>61394937
Basically, yes, but there's a hard cap for on-package HBM2 since each stack requires a separate PHY.
>>
>>61394965
While also offering 2:1 FP16 with 484 mm^2 die.
Vega10 is as impressive as it gets hardware-wise.
>>
>>61394223
RX VEGA is at 13.5 I guess. I hope the geometry culling and HBC works well and get implemented broadly.
>>
>>61394981
No. The hardware is hot, heavy, and so far, they have shown nearly incomprehensible software wise. The only benchmarks it does reasonably well in are software agnostic.
>>
>>61395009
They need to make TBR work first.
>>
>>61395015
>4k ALU GPU is hot
Water is wet.
>>
>>61395017
What bothers me most on VEGA is that is too power hungry.
>>
>>61395038
>GPU
>*too* power hungry
Prepare for Volta boyo.
550mm^2 of FinFETs await you and your waterblock.
>>
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>>61395052
>they all thought big die pascal was a meme
>it wasn't a meme
>thermi is back
>>
>>61395169
what happens when they run out of famous scientist names?
>>
>>61395169
Dude 815mm^2 die lmao.
And that's like 214mm^2 more than GP100.
Assuming GV102 is like 20% bigger it'll get very hot and very Fermi.
Or nv30 is you're old enough to remember it.
>>
>>61395192
Scraping the bottom of the barrel, of course.
>>
>>61395192
Dunno.
AMD started naming GPU uarches after stars when they got bored of islands.
>>
Nigger?
>>
>>61395275
Cattle.
>>
.... I accidentally stumbled here from /k/... and I can kinda keep up with the intel/amd bit.. but pretty much everything beyond that is greek to me. Can someone bring it down to common english?
>>
>>61396025
No. You need to go back to your containment board.
>>
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>>61396044
No. I have other interests beyond guns and I want to know more about things going on in this sphere of influence today.
>>
>>61396025
GPU stands for Gaming Processing Unit
>>
>>61393012
>>61393012
The Stonecutters
>>
>>61394792
What killed SG? Intel?
>>
>>61396309
Their arrogance and failure to adopt to the ever changing market. Competiton started offering more for cheaper.
Same happened with DEC actually.
>>
>>61396309
But generally yes, Pentium Pro and FSB killed specialised SG workstations.
>>
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>>61394260
>>
>>61396134
Dumbed it down a bit too much m8.
>>
>>61396374
Linux definitely helped. imho all of those vendor Unixes were pointless special snowflakes and more trouble than they were ever worth, but HP-UX takes the golden helmet prize.
If only DEC had stuck to making killer network cards.
>>
>>61396554
If only Compaq that bought DEC was smart enough to not axe Alpha series.
These were great.
But I guess Intel will stick to making NICs and infiniband adapters if they continue retarded stunts like that.
Current AMD management will not forgive Intel any mistake.
>>
>>61389951
that amd guy should use this in his presentation instead.
>>
>>61396025
New Intel is now the old AMD, new AMD is now the older AMD.

Nvidia is going to try and steal AMDs MCM thunder after they release Volta.

AMD could be king of the silicon world if they weren't tripping over their own dick.
>>
>>61397390
>Nvidia is going to try and steal AMDs MCM thunder after they release Volta.
All they have is a whitepaper. I don't think they even have an interconnect like IF.
>>
>>61393259
This shit dream again, even raja admit those idea is dumb now
>>
>>61396413
Yeah, let's go buy the Irish processor. Where is that?
>>
>>61395052
Release 375watt vega,

Pray Nvidia going to fail, yup this the only way amd win. oh wait vega still get rekt by 1080
>>
>>61389545
it would be more complex integration.

HBM needs a silicon interposer instead of just an organic substrate because of the signal line density.
(Infinity Fabric GMI = 32 differential pairs between each pair of dies, HBM = ~1700 pins per module)
>>
>>61392858
An APU doesn't perform at dedicated card levels.
>>
>>61398541
Because of it's shared memory so far which has been limited to DDR3 in the desktop. And it's on die architrcture means there isn't enough space for a powerful GPU.

HBM basically eliminates the shared memory problem. And those huge threadripper heat spreaders means the GPU can be massive in comparison.
>>
>>61397773
Because of infinity fabric. It's such a powerful tool at their disposal for cross die communication that having the GPU taking up half the CPU die is dumb.
>>
>>61397586
They have NVlink.
>>
>>61398721
discrete gpus will always be more powerful
>>
>>61398791
>Sky is blue
Tell me more Copernicus.

But a large APU could wipe out the complete middle and bottom end of a graphics card stack.
>>
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>>61398791
>>61398861
32 core TR APU with AMD discrete GPU.

Basically, rape.
>>
Apu that can work together with Discrete Gpu when ?
>>
>>61397835
>>>/v/

begone vtard
>>
>>61397835
Watch Vega not be a discrete GPU at all, but actually an APU with discrete performance because HBM and lower-latency.
>>
>>61397390
>AMD could be king of the silicon world if they weren't tripping over their own dick.

that made me kek more than it should have.
>>
>>61398920
Now.

Vulkan and DX12 offer explicit multi adapter tech.
>>
>>61398735
>point-to-point mezzanine PCI-E substitute
It's okay for dense compute nodes.
Nothing else.
>>
>>61397776
>Yeah, let's go buy the Irish processor. Where is that?
The edison was designed by the team in Leixlip, Dublin. Take from that what you will.

Also, the leixlip fabs have been part of making some important stuff.
>>
>>61399220
Need developer to use it, how lame. Better version when
>>
>>61400742
When Khronos and Microsoft implement automatic split frame rendering.
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Thread images: 13


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