Write/Read on RAM DDR module with FPGA

You're going to have to provide more details on how precisely you intend to read & write - like the setup, I realize you are asking about the method. Unless you mean you need both setup AND method in which case you clearly don't possess the knowledge to be able to pull this off successfully.

>>935189
I find it rather interesting that ostensibly you can write code for an FPGA but you don't know to consult either the datasheet for DDR memory or go find the standards documentation for DDR memory to find this information and/or understand this information? No bully, but: Are you sure you know enough about what you're trying to do to be working with what you're trying to work with, here?

>>935189
This is a rather strange request for /diy/. although i bet the neckbeards at /g/ don't know anything about FPGAs

What kind of FPGA are you using? what evaluation board? What kind of RAM?

Is it a SoC with the RAM shared between the processing system and programmable logic?

Just buy an IP, or try something from opencores.org. Else, be prepared for several months full time work.

>>935189
I googled "ddr specifications" and the following link was the first fucking link.

Stop shitting up this fucking board because you're too lazy to switch from you yaoi faggot manga site to google.

https://www.google.com/url?sa=t&source=web&rct=j&url=http://cs.ecs.baylor.edu/~maurer/CSI5338/JEDEC79R2.pdf&ved=0ahUKEwjZ2fS81MPKAhVsuoMKHUxmCKIQFgghMAA&usg=AFQjCNFEKUUkXI8Zz7_NkY4qRmu4dIclqA&sig2=7Be9JB5u_dA7l2-dRW9eiQ

Hi /diy/, I've been searching for information on how to connect a toilet to a sewer line, but I don't find serious source, or functional approach. Any suggestion?